1. Field of the Invention
The present invention relates to microprocessors, and more particularly to a microprocessor which is well suited, in raising the operating speed of any microprocessor, to rapidly transmit the change of a signal on a signal line of high capacitive load so as to heighten the processing speed of a system.
2. Description of the Prior Art
As a method by which a memory management unit etc. disposed outside a microprocessor are informed of the generation of an address earlier, there has heretofore been one wherein, as described in `USERS MANUAL ON 32-BIT MICROPROCESSOR MC68020` by Motorola, Inc., a signal called ECS (External Cycle Start) is produced simultaneously with the generation of the address inside the processor. Since address signals are usually supplied o a large number of chips, they are subjected to a heavy capacitive load and are low in speed. In contrast, since the ECS signal is connected to only the memory management unit, it undergoes a light load and arrives at high speed. Accordingly, the side of the memory management unit can know the arrival of the address beforehand upon viewing the ECS signal and can make preparations for the acceptance of the address. It is therefore possible to raise the speed of processing of an address conversion.
In prior-art methods the address is delayed due to the heavy load even though the acceptance of the address input is ready. This leads to the problem that, when the performance of the whole system is to be enhanced by heightening a clock frequency or raising the operating speed of a memory, the delay of the address itself degrades the system performance much.